This application claims the priority benefit of Taiwan application Ser. No. 89103867, filed Mar. 4, 2000.
1. Field of the Invention
This invention relates to semiconductor fabrication technology, and more particularly, to a method of defining a mask pattern for a photoresist layer, which can help reduce the critical dimension of the pattern transferred from the mask.
2. Description of the Related Art
High integration is the primary goal in the fabrication of integrated circuit (IC) devices. To achieve this goal, the various components in the integrated circuit have the smallest dimensions possible. Current semiconductor fabrication technology is able to fabricate integrated circuits down to the 0.25 xcexcm (micrometer) submicron level of integration. Photolithography is the key technology in the fabrication of MOS (metal-oxide semiconductor) related semiconductor structures, such as doped areas and contact openings. In submicron integration, the pattern transfer from a mask through photolithography is highly critical. Various methods, such as Optical Proximity Correction (OPC) and Phase Shift Mask (PSM), have been proposed to achieve high definition for the photolithographic transfer of a pattern from a mask onto a photoresist layer.
The OPC method is designed for the purpose of minimizing the deviation in the critical dimension of the transferred pattern due to a proximity effect. During the photolithographic process, the exposure light passing through the mask and striking the photoresist layer is widely scattered due to dispersion. Moreover, the exposure light transmitting through the photoresist layer reflects back from the substrate, causing interference that then causes double-exposure on the photoresist layer. As a result, the critical dimension of the transferred pattern from the mask is degraded. This undesired proximity effect is illustratively depicted in FIGS. 1 and 2.
In FIG. 1, the dashed rectangular area indicated by the reference numeral 10 is the intended pattern that is to be transferred from the mask onto the photoresist layer. Due to the proximity effect, however, the actually resulting pattern is shrunk in size to the shaded area indicated by the reference numeral 11. In FIG. 2, the dashed areas indicated by the reference numeral 20 are the intended patterns that are to be transferred from the mask onto the photoresist layer. Due to the proximity effect, however, the actually resulting pattern deviates from the intended positions and is inaccurately dimensioned, as seen in the shaded areas indicated by the reference numeral 21. The OPC method solves the foregoing problem by first using computer software to compute the dimensional and positional deviations between the resulting patterns on the photoresist layer and the predefined patterns on the mask, and then using the data to correct the size and position of the patterns on the mask. This can improve accurate definition of the transferred patterns. One drawback to the OPC method, however, is that it requires complex computation to obtain the necessary corrections to the mask patterns and is therefore very difficult to implement.
FIG. 3A is a schematic diagram used to explain the principle of photolithography, whereas FIG. 3B is a schematic diagram used to explain the principle of the PSM method. These two diagrams are juxtaposed for the purpose of comparison. As shown in FIG. 3A, conventional photolithography utilizes a mask including a predefined pattern of chromium layers 100 coated on a crystal sheet 150. The chromium layers 100 represent the pattern that is to be transferred onto the photoresist layer (not shown). The chromium layers 100 are opaque to light. During the exposure process, exposure light 170 passes through the mask to illuminate the unmasked portions of the photoresist layer (not shown). The amplitude distribution of the exposure light 170 over the mask, the amplitude distribution of the exposure light 170 over the photoresist layer, and the intensity distribution of the exposure light 170 over the photoresist layer are respectively illustrated in the three graphs beneath.
As shown in FIG. 3B, by the PSM method, the mask is additionally provided with a phase-shifter layer 120 which can invert the phase of the light passing therethrough. The light passing through the phase-shifter layer 120 thus interferes in a destructive manner with the neighboring light that does not pass through the phase-shifter layer 120, thus creating sharp definition in the transferred pattern. The PSM method has the benefit of enhancing the definition of the transferred pattern without having to use short-wavelength exposure light. One drawback to the PSM method, however, is that the mask is quite difficult to manufacture and modify.
Although the foregoing OPC and PSM methods can help enhance the pattern definition in downsized fabrication of integrated circuits, use of them is still suboptimal due to complex and costly implementation.
The invention provides a method of defining a mask pattern for a photoresist layer in semiconductor fabrication. A pattern having smaller opening is formed, even when using a conventional photomask.
The method of the invention comprises coating a photoresist layer containing an additive on a dielectric layer. The photoresist layer has an opening formed therein. The additive comprises 2,2xe2x80x2-azo-bis-isobutyronitride (AIBN) or phenyl-azo-triphenylmethane. The photoresist layer is exposed and developed. Then, a hard baking step is performed. A UV curing or a hot curing step is performed at the photoresist layer. As a result, the additive in the photoresist layer reacts to form nitrogen (N2) gas. Nitrogen gas makes the photoresist layer expand. The opening is decreased by the expansion of the photoresist layer. The dielectric layer is etched according to the expanded photoresist layer so that a via or a trench, smaller than a conventional one, is formed.
The invention provides a method comprising adding a compound into a photoresist material. When the additive is heated or exposed to UV light, the photoresist material increases. Thus, critical dimension size can be improved.